Hardware Verification Engineer

We are seeking a Hardware Verification Engineer to ensure the functional correctness of our complex SoC (System on Chip) designs. You will develop advanced verification environments using UVM (Universal Verification Methodology) and perform RTL simulation, formal verification, and gate-level netlist validation. You will work closely with design engineers to identify bugs early in the design cycle and ensure that our products meet the highest quality and performance standards.

1. Master’s degree in Electrical Engineering or Computer Science.

2. 3+ years of experience in ASIC/FPGA verification.

3. Strong command of SystemVerilog and UVM.

4. Familiarity with scripting languages like Python, Perl, or Tcl for automation.

5. Strong debugging skills and knowledge of computer architecture.

• Annual performance-based salary reviews and promotions.

• On-site fitness center, swimming pool, and sports courts.

• Free shuttle bus service from major residential areas.

• Company-sponsored language classes (Mandarin/English).

• Annual 10-day "Learning Leave" for personal or professional growth.